This invention relates to digital frequency synthesizers, and more specifically to such synthesizers which are implemented using a minimum number of electronic components.
Phase locked loop digital frequency synthesizers are used in radio frequency receivers and transmitters to generate a signal whose frequency is precisely controlled. A variable frequency oscillator is controlled with a feedback system consisting of a variable modulus prescaler driven by the oscillator, which in turn drives a programmable digital divider. The output of the programmable digital divider is compared in a phase detector with the output of a reference oscillator and (in some cases) a reference frequency digital divider. The output of the phase detector is filtered to provide the frequency control signal for the oscillator, typically a voltage applied to a diode to control its capacitance. The diode is resonated with an inductor, forming a tuned circuit which controls the frequency of the variable frequency oscillator. The frequency of the synthesizer is changed by changing the effective divide ratio between the variable frequency oscillator and the phase detector, controlled by the modulus of the prescaler and the modulus of the programmable divider. The filter must perform two functions; first, to remove high frequency components of the phase detection process and second, to stabilize the control loop. These requirements are often in conflict. Unwanted spectral components from the filter frequency modulate the variable oscillator, resulting in spurious modulation sidebands which limit the usefulness of the synthesizer system. Controlling these unwanted signal components by lowering the cutoff frequency of the filter reduces the tuning speed.
The phase noise of a synthesizer is dominated by the reference oscillator for modulation or offset frequencies well inside the loop bandwidth of the control system, and by the variable frequency oscillator for frequencies outside the loop bandwidth of the control system. If tuning speed or spurious suppression are not considered, the loop bandwidth is selected equal to the frequency where the noise from these two contributors are equal, thus optimizing the phase noise performance. Variable oscillators with poor noise characteristics could be utilized in many systems by selecting a high loop bandwidth. Such designs are precluded by limitations in the design of the loop filter. Filter bandwidths sufficient to optimize the noise performance result in unacceptable spurious levels from products of the phase detector. This impasse could be broken, in concept, with a more complex, non-minimum phase or higher order loop filter. Use of more complex analog loop filters has proven tedious, with unattractive cost/benefit ratios. Substituting a digital adder and analog to digital converter for the phase detector, and rationalizing the counter outputs of the programmable and reference counters by including a digital multiplier can favorably impact this design tradeoff. (Zuta, Marc--"A New PLL with Fast Settling Time and Low Phase Noise" Microwave Journal, June, 1998 Published by Horizon House Publications 685 Canton Street, Norwood Mass. 02602 (USPS 396-250) This topology also provides the opportunity to impact the loop filter design problem with a digital filter between the digital adder and the digital to analog converter. U.S. Pat. No. 5,182,528 teaches another method, wherein the characteristics of the oscillator are modified to include both digital and analog controls, and the oscillator tuning characteristics are stored in a computer, so the correct tuning voltage and digital signal can be anticipated, thus reducing the tuning time. While this solution can improve the tuning time, it does not address the phase noise compromises.
The oscillator as described above presents other difficulties, as well. The inductor necessarily creates magnetic fields which can leak to other parts of the circuit or the antenna, causing undesired interference to the equipment containing the synthesizer or, through the antenna, other equipment at a distance. Further, in order to tune wide frequency ranges, such as the octave or more required by the digital satellite service, for example, voltages larger than required for the rest of the circuitry are used, requiring an additional power supply. In some applications, outputs from the oscillator are required to be in phase quadrature, which requires additional circuitry to generate. These difficulties are obviated with a fully integrated, current controlled delay oscillator (.sup.1 Johan van der Tang and Dieter Kasperkovitz, "A 0.9-2.2 GHz Monolithic Quadrature Mixer Oscillator for Direct Conversion Satellite Receivers", in IEEE ISSCC Digest of Technical Papers, 1997, pp. 88-89), but this oscillator has not found use because its high phase noise requires loop bandwidths inconsistent with typical tuning speed and spurious modulation sideband requirements.
Until the present invention, there has not been a means to meet the phase noise, spurious suppression, and tuning speed requirements with synthesizers utilizing fully integrated oscillators for use in modern communication systems, such as direct broadcast satellite receivers.